40-nm FPGAs: Architecture and Performance Comparison

FPGA users are constantly looking for ways to differentiate their products in the market place and in doing so they define new systems with new requirements. The new requirements usually are increased functionality, higher processing performance, low power consumption, customizable capabilities, and reprogrammability. To achieve these requirements, the proven methodology is to double the FPGA density when moving to smaller process geometries. However, moving to smaller geometries like 40 nm does not come free. While dynamic power reduces at the 40-nm process node, static power consumption increases through unwanted leakage in transistors (shorter gate lengths). Through processing techniques and architectural innovations like Programmable Power Technology, Altera’s 40-nm Stratix® IV FPGAs not only provide increased functionality and higher processing performance but also lower power consumption.